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PRELIMINARY
AM79R70
Ringing Subscriber Line Interface Circuit
DISTINCTIVE CHARACTERISTICS
s Ideal for ISDN-TA and set top applications s On-chip ringing with on-chip ring-trip detector s Low standby state power s Battery operation: -- VBAT1: -40 V to -67 V -- VBAT2: -19 V to VBAT1 s On-chip battery switching and feed selection s On-hook transmission s Polarity reversal option s Programmable constant-current feed s Programmable Open Circuit voltage s Programmable loop-detect threshold s Current gain = 1000 s Two-wire impedance set by single component s Ground-key detector s Tip Open state for ground-start lines s Internal VEE regulator (no external -5 V power supply required) s Two on-chip relay drivers and snubber circuits
BLOCK DIAGRAM
Relay Driver RTRIP1 RTRIP2 Relay Driver RYOUT2 RYE RYOUT1 D1 D2 C1 C2 C3 E1 DET RD VTX RSN RINGIN RDC RDCR
A(TIP) Ring-Trip Detector HPA Two-Wire Interface HPB Signal Transmission B(RING) Power-Feed Controller Ground-Key Detector Off-Hook Detector Input Decoder and Control
VBAT2 Switch Driver RSGL RSGH B2EN
VBAT1
VCC VNEG BGND AGND/DGND
This document contains information on a product under development at Advanced Micro Devices. The information is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed product without notice.
Publication# 21776 Rev: B Amendment: /0 Issue Date: July 1998
PRELIMINARY
GENERAL DESCRIPTION
The AMD family of subscriber line interface circuit (SLIC) products provide the telephone interface functions required throughout the worldwide market. AMD SLIC devices address all major telephony markets including central office (CO), private branch exchange (PBX), digital loop carrier (DLC), fiber-in-the-loop (FITL), radio-in-the-loop (RITL), hybrid fiber coax (HFC), and video telephony applications. The AMD SLIC devices offer support of BORSHT (battery feed, overvoltage protection, ringing, supervision, hybrid, and test) functions with features including current limiting, on-hook transmission, polarity reversal, tipopen, and loop-current detection. These features allow reduction of linecard cost by minimizing component count, conserving board space, and supporting automated manufacturing. The AMD SLIC devices provide the two- to four-wire hybrid function, DC loop feed, and two-wire supervision. Two-wire termination is programmed by a scaled impedance network. Transhybrid balance can be achieved with an external balance circuit or simply programmed using a companion AMD codec device, the Am79C02/03/031 DSLACTM device, the Am79Q02/021/031 Programmable Quad SLAC (QSLACTM) device, or the Am79Q5457/4457 Nonprogrammable QSLAC device. The AM79R70 Ringing SLIC device is a bipolar monolithic SLIC that offers on-chip ringing. Now designers can achieve significant cost reductions at the system level for short-loop applications by integrating the ringing function on chip. Examples of such applications would be ISDN Terminal Adaptors and set top boxes. Using a CMOS-compatible input waveform and wave shaping R-C network, the AM79R70 Ringing SLIC can provide trapezoidal wave ringing to meet various design requirements. In order to further enhance the suitability of this device in short-loop, distributed switching applications, AMD has maximized power savings by incorporating battery switching on chip. The AM79R70 Ringing SLIC device switches between two battery supplies such that in the Off-hook (active) state, a low battery is used to save power. In order to meet the Open Circuit voltage requirements of fax machines and maintenance termination units (MTU), the SLIC automatically switches to a higher voltage in the On-hook (standby) state. Like all of the AMD SLIC devices, the AM79R70 Ringing SLIC device supports on-hook transmission, ring-trip detection and programmable loop-detect threshold. The AM79R70 Ringing SLIC device is a programmable constant-current feed device with two on-chip relay drivers to operate external relays. This unique device is available in the proven AMD 75 V bipolar process in 32-pin PLCC packages.
2
AM79R70 Data Sheet
PRELIMINARY
ORDERING INFORMATION Standard Products
AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the elements below
AM79R70 J C
TEMPERATURE RANGE C = Commercial (0C to 70C)*
PACKAGE TYPE J = 32-pin Plastic Leaded Chip Carrier (PL 032) POLARITY REVERSAL OPTION Blank = No Polarity Reversal -1 = Polarity Reversal DEVICE NUMBER/DESCRIPTION AM79R70 Subscriber Line Interface Circuit
Valid Combinations
Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations, to check on newly released combinations, and to obtain additional data on AMD's standard military grade products.
AM79R70 -1
JC
Note: * Functionality of the device from 0C to +70C is guaranteed by production testing.
SLIC Products
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PRELIMINARY
CONNECTION DIAGRAM Top View
32-Pin PLCC RYOUT2 B(RING) VBAT2 BGND A(TIP)
VCC
4 RYE RYOUT1 B2EN VBAT1 D1 E1 C3 C2 DET 5 6 7 8 9 10 11 12 13 14 C1
3
2
1
32
31 30 29 28 27 26 25 24 23 22 21 RTRIP1 RTRIP2 HPB HPA RINGIN RDCR VTX VNEG RSN
15 D2
16 17 RSGH NC
18 RSGL
19 20 RDC AGND/DGND
Notes: 1. Pin 1 is marked for orientation. 2. NC = No connect
4
AM79R70 Data Sheet
RD
PRELIMINARY
PIN DESCRIPTIONS
Pin Names AGND/DGND A(TIP) B2EN BGND B(RING) C3-C1 D1 D2 DET E1 HPA HPB RD RDC Type Gnd Output Input Gnd Output Inputs Input Input Output Input Capacitor Capacitor Resistor Resistor Description Analog and Digital ground are connected internally to a single pin. Output of A(TIP) power amplifier. VBAT2 Enable. Logic Low enables operation from V BAT2. Logic High enables operation from VBAT1. TTL compatible. Battery (power) ground. Output of B(RING) power amplifier. Decoder. TTL compatible. C3 is MSB and C1 is LSB. Relay1 Control. TTL compatible. Logic Low activates the Relay1 relay driver. (Option) Relay2 Control. TTL compatible. Logic Low activates the Relay2 relay driver. Detector. Logic Low indicates that the selected detector is tripped. Logic inputs C3-C1, E1, and E0 select the detector. Open-collector with a built-in 15 k pull-up resistor. (Option) A logic High selects the off-hook detector. A logic Low selects the ground-key detector. TTL compatible. High-pass filter capacitor; A(TIP) side of high-pass filter capacitor. High-pass filter capacitor; B(RING) side of high-pass filter capacitor. Detector resistor. Threshold modification/filter point for the off-hook detector. DC feed resistor. Connection point for the DC feed current programming network, which also connects to the receiver summing node (RSN). VRDC is negative for normal polarity and positive for reverse polarity. Connection point for feedback during ringing. Ring Signal Input. Pin for ring signal input. Square-wave shaped by external RC filter. Requires 50% duty cycle. CMOS-compatible input. Saturation Guard High. Pin for resistor to adjust Open Circuit voltage when operating from VBAT1. Saturation Guard Low. Pin for resistor to adjust the anti-saturation cut-in voltage when operating from both VBAT1 and VBAT2. The metallic current (AC and DC) between A(TIP) and B(RING) is equal to 1000 x the current into this pin. The networks that program receive gain, two-wire impedance, and feed current all connect to this node. Ring-trip detector. Ring-trip detector threshold set and filter pin. Ring-trip detector threshold offset (switch to VBAT1). For power conservation in any nonringing state, this switch is open. Common Emitter of RYOUT1/RYOUT2. Emitter output of RYOUT1 and RYOUT2. Normally connected to relay ground. Relay/switch driver. Open collector driver with emitter internally connected to RYE. (Option) Relay/switch driver. Open collector driver emitter internally connected to RYE. Battery supply and connection to substrate. Power supply to output amplifiers. Connect to off-hook battery through a diode. Positive analog power supply. Negative analog power supply. This pin is the return for the intern VEE regulator. Regulated Voltage. Provides negative power supply for power amplifiers, connection point for inductor, filter capacitor, and chopper stabilization. Transmit Audio. This output is 0.5066 times the A(TIP) and B(RING) metallic voltage. VTX also sources the two-wire input impedance programming network.
RDCR RINGIN RSGH RSGL RSN
-- Input Input Input Input
RTRIP1 RTRIP2 RYE RYOUT1 RYOUT2 VBAT1 VBAT2 VCC VNEG VREG VTX
Input Input Output Output Output Battery Battery Power Power Input Output
SLIC Products
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PRELIMINARY
ABSOLUTE MAXIMUM RATINGS
Storage temperature ......................... -55C to +150C VCC with respect to AGND/DGND .......... 0.4 V to +7 V VNEG with respect to AGND/DGND ...... 0.4 V to VBAT2 VBAT2 ....................................................VBAT1 to GND VBAT1 with respect to AGND/DGND: Continuous..................................... +0.4 V to -80 V 10 ms ............................................. +0.4 V to -85 V BGND with respect to AGND/DGND........ +3 V to -3 V A(TIP) or B(RING) to BGND: Continuous ...............................VBAT1 -5 V to +1 V 10 ms (f = 0.1 Hz) ..................VBAT1 -10 V to +5 V 1 s (f = 0.1 Hz) .....................VBAT1 -15 V to +8 V 250 ns (f = 0.1 Hz) ...............VBAT1 -20 V to +12 V Current from A(TIP) or B(RING).....................150 mA RYOUT1, RYOUT2 current................................75 mA RYOUT1, RYOUT2 voltage ..................... RYE to +7 V RYOUT1, RYOUT2 transient ................. RYE to +10 V RYE voltage ........................................ BGND to VBAT1 C3-C1, D2-D1, E1, B2EN, and RINGIN Input voltage .........................-0.4 V to VCC + 0.4 V Maximum power dissipation, continuous, TA = 70C, No heat sink (See note): In 32-pin PLCC package..............................1.67 W Thermal Data:................................................................ JA In 32-pin PLCC package....................... 45C/W typ
OPERATING RANGES
Commercial (C) Devices Ambient temperature ............................. 0C to +70C* VCC ..................................................... 4.75 V to 5.25 V VNEG ..................................................-4.75 V to VBAT2 VBAT1 .................................................... -40 V to -67 V VBAT2 ....................................................-19 V to VBAT1 AGND/DGND.......................................................... 0 V BGND with respect to AGND/DGND ........................ -100 mV to +100 mV Load resistance on VTX to ground .............. 20 k min
The Operating Ranges define those limits between which the functionality of the device is guaranteed. * Functionality of the device from 0C to +70C is guaranteed by production testing.
Note: Thermal limiting circuitry on chip will shut down the circuit at a junction temperature of about 165C. The device should never see this temperature and operation above 145C junction temperature may degrade device reliability. See the SLIC Packaging Considerations for more information.
Stresses above those listed under Absolute Maximum Ratings may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability.
6
AM79R70 Data Sheet
PRELIMINARY
ELECTRICAL CHARACTERISTICS
Description Transmission Performance 2-wire return loss ZVTX, analog output impedance VVTX, analog output offset voltage ZRSN, analog input impedance Overload level, 2-wire and 4-wire, off hook Active state Overload level, 2-wire THD (Total Harmonic Distortion) THD, on hook, OHT state On hook, RLAC = 600 +3 dBm, BAT2 = -24 V 0 dBm, RLAC = 600 , BAT1 = -67 V 200 Hz to 3.4 kHz 200 Hz to 800 Hz, Normal polarity Active or OHT state 0 to 100 Hz, TA = +25C 40 40 12 28 25 +7 -83 0 dBm, 1 kHz 0 dBm, 1 kHz OHT state, on hook OHT state, on hook 300 to 3400 Hz relative to 1 kHz +3 dBm to -55 dBm relative to 0 dBm 0 dBm to -37 dBm +3 dBm to 0 dBm 0 dBm, 1 kHz -0.20 -6.22 -0.35 -6.37 -0.10 -0.10 -0.10 -0.35 3 0 -6.02 0 -6.02 +14 -76 +0.20 -5.82 +0.35 -5.77 dB +0.10 +0.10 +0.10 +0.35 s 3, 4 3, 4 3 1, 4, 6 2.5 0.88 -64 -50 -40 dB 5 -50 1 200 Hz to 3.4 kHz (Test Circuit D) 26 3 20 +50 20 dB mV Vpk Vrms 4 2a 2b 1, 4, 6 4 Test Conditions (See Note 1) Min Typ Max Unit Note
Longitudinal Performance (See Test Circuit C) Longitudinal to metallic L-T, L-4 balance Longitudinal signal generation 4-L Longitudinal current per pin (A or B) Longitudinal impedance at A or B Idle Channel Noise C-message weighted noise Psophometric weighted noise Gain accuracy4- to 2-wire Gain accuracy2- to 4-wire and 4- to 4-wire Gain accuracy4- to 2-wire Gain accuracy2- to 4-wire and 4- to 4-wire Gain accuracy over frequency Gain tracking Gain tracking OHT state, on hook Group delay dBrnC dBmp 4 dB mArms /pin 4
Insertion Loss and Four- to Four-Wire Balance Return Signal (See Test Circuits A and B)
3
SLIC Products
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PRELIMINARY
ELECTRICAL CHARACTERISTICS (CONTINUED)
Description Line Characteristics IL, Loop-current accuracy IL, Long loops, Active state IL, Accuracy, Standby state IL in constant-current region, B2EN = 0 RLDC = 600 , RSGL = open RLDC = 750 , RSGL = short V BAT1 - 10 V I L = -------------------------------------R L + 400 IL = constant-current region TA = 25C ILLIM IL, Loop current, Open Circuit state IA, Pin A leakage, Tip Open state IB, Pin B current, Tip Open state VA, Standby, ground-start signaling VAB, Open Circuit voltage Power Supply Rejection Ratio (VRIPPLE = 100 mVrms), Active Normal State VCC VNEG VBAT1 VBAT2 Power Dissipation On hook, Open Circuit state On hook, Standby state On hook, OHT state On hook, Active state Off hook, Standby state Off hook, OHT state Off hook, Active state Supply Currents ICC, On-hook VCC supply current Open Circuit state Standby state OHT state Active state-normal Open Circuit state Standby state OHT state Active state-normal Open Circuit state Standby state OHT state Active state-normal 3.0 3.2 6.2 6.5 0.1 0.1 0.7 0.7 0.45 0.6 2.0 2.7 4.5 5.5 8.0 9.0 0.2 0.2 1.1 1.1 1.0 1.5 4.0 5.0 VBAT1 VBAT2 VBAT1 VBAT1 VBAT1 or VBAT2RL = 300 VBAT1RL = 300 VBAT2RL = 300 48 55 200 220 2000 2000 550 100 80 300 350 2800 2200 750 mW 9 9 50 Hz to 3400 Hz 50 Hz to 3400 Hz 50 Hz to 3400 Hz 50 Hz to 3400 Hz 33 30 30 30 50 40 50 50 dB 5 Active, A and B to ground OHT, A and B to ground RL = 0 RL = 0 B to ground A to -48 V = 7 k, B to ground = 100 -7.5 42 34 -5 V 7 0.9IL 20 20 0.8IL IL 21.7 IL 1.2IL mA 18 27 55 55 39 110 4 100 100 A mA 4 1.1IL Test Conditions (See Note 1) Min Typ Max Unit Note
INEG, On-hook VNEG supply current
mA
IBAT, On-hook VBAT supply current
8
AM79R70 Data Sheet
PRELIMINARY
ELECTRICAL CHARACTERISTICS (continued)
Description VIH, Input High voltage VIL, Input Low voltage IIH, Input High current IIL, Input Low current Logic Output DET VOL, Output Low voltage VOH, Output High voltage Ring-Trip Detector Input Ring detect accuracy BAT1 - 1 IRTD = --------------------------- + 24 A * 335 RRT1 Bat1 = -67 V, ringload = 1570 VRINGIN = 2.5 V -10 +10 % IOUT = 0.8 mA, 15 k to VCC IOUT = -0.1 mA, 15 k to VCC 2.4 0.40 V -75 -400 Test Conditions (See Note 1) Min 2.0 0.8 40 Typ Max Unit Note Logic Inputs (C3-C1, D2-D1, E1, and B2EN) V A
Ring Signal VAB, Ringing VAB Ringing offset VAB/VRINGIN (RINGIN gain) Ground-Key Detector Thresholds Ground-key resistive threshold Ground-key current threshold Loop Detector RLTH, Loop-resistance detect threshold Active, VBAT1 Active, VBAT2 Standby IOL = 30 mA IOL = 40 mA VOH = +5 V IZ = 100 A IZ = 30 mA 6.6 7.9 11 -20 -20 -12 +0.25 +0.30 20 20 12 +0.4 +0.8 100 % 8 B to ground B to ground 2 5 11 10 k mA 57 61 0 180 Vpk V --
Relay Driver Output (RELAY1 and 2) VOL, On voltage (each output) VOL, On voltage (each output) IOH, Off leakage (each output) Zener breakover (each output) Zener on voltage (each output) V A V 4
RELAY DRIVER SCHEMATIC
RYOUT1 RYOUT2
RYE BGND BGND
SLIC Products
9
PRELIMINARY
Notes: 1. Unless otherwise noted, test conditions are BAT1 = -67 V, BAT2 = -24 V, VCC = +5 V, VNEG = -5 V, RL = 600 , RDC1 = 80 k, RDC2 = 20 k, RD = 75 k, no fuse resistors, CHP = 0.018 F, CDC = 1.2 F, D1 = D2 = 1N400x, two-wire AC input impedance (ZSL) is a 600 resistance synthesized by the programming network shown below. RSGL = open, RSGH = open, RDCR = 2 k, RRT1 = 430 k, RRT2 = 12 k, CRT = 1.5 F, RSLEW = 150 k, CSLEW = 0.33 F.
VTX RT1 = 150 k
RT2 = 150 k
CT1 = 60 pF
RSN RRX = 300 k
~ VRX
2. a. Overload level is defined when THD = 1%. b. Overload level is defined when THD = 1.5%. 3. Balance return signal is the signal generated at VTX by VRX. This specification assumes that the two-wire AC load impedance matches the programmed impedance. 4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests. 5. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization. 6. Group delay can be greatly reduced by using a ZT network such as that shown in Note 1 above. The network reduces the group delay to less than 2 s and increases 2WRL. The effect of group delay on linecard performance may also be compensated for by synthesizing complex impedance with the QSLAC or DSLAC device. 7. Open Circuit VAB can be modified using RSGH. 8. RD must be greater than 56 k. Refer to Table 2 for typical value of RLTH. 9. Lower power is achieved by switching into low-battery state in standby. Standby loop current is returned to VBAT1 regardless of the battery selected.
Table 1. SLIC Decoding
(DET) Output State 0 1 2 3 4 5 6* 7* C3 C2 C1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 2-Wire Status Open Circuit Ringing Active On-hook TX (OHT) Tip Open Standby Active Polarity Reversal OHT Polarity Reversal E1 = 1 Ring trip Ring trip Loop detector Loop detector Loop detector Loop detector Loop detector Loop detector E1 = 0 Ring trip Ring trip Ground key Ground key Ground key Ground key Ground key Ground key B2EN = 1** VBAT1 B2EN B2EN Battery Selection
Notes: * Only -1 performance grade devices support polarity reversal. ** For correct ground-start operation using Tip Open, VBAT1 on-hook battery must be used.
10
AM79R70 Data Sheet
PRELIMINARY Table 2. User-Programmable Components
Z T = 500 ( Z 2WIN - 2RF ) ZT is connected between the VTX and RSN pins. The fuse resistors are RF, and Z2WIN is the desired 2-wire AC input impedance. When computing ZT, the internal current amplifier pole and any external stray capacitance between VTX and RSN must be taken into account. ZRX is connected from VRX to RSN. ZT is defined above, and G42L is the desired receive gain. RDC1, RDC2, and CDC form the network connected to the RDC pin. ILOOP is the desired loop current in the constant-current region. RDCR1, RDCR2, and CDCR form the network connected to the RDCR pin. See Applications Circuit for these components.
ZL 1000 * ZT Z RX = ----------- * ------------------------------------------------G42L ZT + 500 ( ZL + 2R F ) 2500 R DC1 + R DC2 = -------------I LOOP 3000 R DCR1 + RDCR2 = --------------------Iringlim R DC1 + R DC2 C DC = 19 ms * --------------------------------RDC1 R DC2 C DCR R DCR1 + R DCR2 = ---------------------------------------- * 150 s R DCR1 R DCR2
CDCR sets the ringing time constant, which can be between 15 s and 150 s.
R D = R LTH * 12.67 for high battery state
RD is the resistor connected from the RD pin to GND and RLTH is the loop-resistance threshold between on-hook and off-hook detection. RD should be greater than 56 k to guarantee detection will occur in the Standby state. Choose the value of RD for high battery state; then use the equation for RLTH to find where the threshold is for low battery. This is the same equation as for RD in the preceding equation, except solved for RLTH. For low battery, the detect threshold is slightly higher, which will avoid oscillating between states. RLTH standby < RLTH active VBAT1 < RLTH active VBAT2, which will guarantee no unstable states under all operating conditions. This equation will show at what resistance the standby threshold will be; it is actually a current threshold rather than a resistance threshold, which is shown by the Vbat dependency.
Loop-Threshold Detect Equations RD R LTH = ------------ for high battery 12.67 RD R LTH = ------------ for low battery 11.37 V BAT1 - 10 R LTH = ----------------------------- * R D - 400 - 2R F 915
SLIC Products
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PRELIMINARY
DC FEED CHARACTERISTICS
50 5) VAPPH High Battery Anti-Sat 4) VASH 40 VAB (Volts) 30 1) Constant-Current Region 20 3) VAPPL Low Battery Anti-Sat 2) VASL 10
0
IL (m A)
30
Figure 1. Typical VAB vs. IL DC Feed Characteristics
R DC = R DC1 + R DC2 = 20 k + 80 k = 100 k ( V BAT1 = - 67 V , V BAT2 = - 24 V )
Notes: 1. Constant-current region:
2500 V AB = IL R L = ------------ R L ; where R L = R L + 2RF RDC 1000 * ( 104 * 10 + R SGL ) V ASL = ------------------------------------------------------------------ ; where RSGL = resistor to GND, B2EN = logic Low. 3 6720 * 10 + ( 80 * R SGL ) 1000 * ( R SGL - 56 * 10 ) V ASL = -------------------------------------------------------------- ; where RSGL = resistor to VCC, B2EN = logic Low. 3 6720 * 10 + ( 80 * R SGL ) RSGL to VCC must be greater than 100 k. V APPL = 4.17 + V ASL V APPL I LOOPL = -----------------------------------------------------------------------------( RDC1 + R DC2 ) ------------------------------------- + 2R F + R LOOP 600
3 3
2. Low battery
Anti-sat region:
3.
4. High battery Anti-sat region:
V ASH = V ASHH + V ASL 1000 * ( 70 * 10 + R SGH ) V ASHH = ---------------------------------------------------------------------- ; where RSGH = resistor to GND, B2EN = logic High. 3 1934 * 10 + ( 31.75 * RSGH ) 1000 * ( R SGH + 2.75 * 10 ) V ASHH = ---------------------------------------------------------------------- ; where RSGH = resistor to VCC, B2EN = logic High. 3 1934 * 10 + ( 31.75 * RSGH ) RSGH to VCC must be greater than 100 k. V APPH = 4.17 + VASH V APPH I LOOPH = -----------------------------------------------------------------------------( R DC1 + R DC2 ) ------------------------------------- + 2R F + R LOOP 600
3 3
5.
12
AM79R70 Data Sheet
PRELIMINARY
RING-TRIP COMPONENTS
RRT2 = 12 k CRT = 1.5 F V BAT1 R RT1 = 300 * CF * ----------------------------------------------------------------------------------------------------------------------------------------- * ( R LRT + 150 + 2RF ) Vbat - 3.5 - ( 15 A * 300 * CF * ( R LRT + 150 + 2R F ) ) where RLRT = Loop-detection threshold resistance for ring trip and CF = Crest factor of ringing signal ( 1.25) RSLEW, CSLEW Ring waveform rise time 0.214 * (RSLEW * CSLEW) tr. For a 1.25 crest factor @ 20 Hz, tr 10 mS. (RSLEW = 150 k, CSLEW = 0.33 F.) CSLEW should be changed if a different crest factor is desired.
0
Ringing Reference (Input to RSLEW) B(RING)
A(TIP) Battery This is the best time for switching between RINGING and other states for minimizing detect switching transients.
Figure 2. Ringing Waveforms
A
a RL b IL SLIC RSN RDC2 CDC
RDC1 B RDC
Feed current programmed by RDC1 and RDC2
Figure 3. Feed Programming SLIC Products 13
PRELIMINARY
TEST CIRCUITS
A(TIP) RL 2 VL RL 2 B(RING) RSN VAB SLIC AGND RT RRX VTX
IL2-4 = 20 log (VTX / VAB) A. Two- to Four-Wire Insertion Loss
A(TIP) SLIC VAB RL
VTX
AGND
RT RRX
B(RING) RSN VRX IL4-2 = 20 log (VAB / VRX) BRS = 20 log (VTX / VRX)
B. Four- to Two-Wire Insertion Loss and Four- to Four-Wire Balance Return Signal
1 C
<< RL RL S1 C VL VL RL 2 2 VAB
A(TIP) SLIC
VTX
AGND
RT S2 RRX VRX
B(RING) RSN
S2 Open, S1 Closed L-T Long. Bal. = 20 log (VAB / VL) L-4 Long. Bal. = 20 log (VTX / VL)
S2 Closed, S1 Open 4-L Long. Sig. Gen. = 20 log (VL / VRX)
C. Longitudinal Balance
14
AM79R70 Data Sheet
PRELIMINARY
TEST CIRCUITS (continued)
ZD A(TIP) R VS R ZIN B(RING) RSN RRX ZD: The desired impedance; e.g., the characteristic impedance of the line Return loss = -20 log (2 VM / VS) D. Two-Wire Return Loss Test Circuit VCC 6.2 k A(TIP) VM VTX RT1
SLIC AGND
RT2
CT1
A(TIP)
RL = 600
DET 15 pF RG
B(RING)
B(RING)
E1
E. Loop-Detector Switching
F. Ground-Key Switching
L1
200
C1
RF1 50 A RF2 CAX 33 nF B
200 HF GEN
50 CBX 33 nF
50
L2
C2
VTX SLIC under test
1.5 Vrms 80% Amplitude Modulated 100 kHz to 30 MHz
G. RFI Test Circuit
SLIC Products
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PRELIMINARY
TEST CIRCUITS (continued)
+5 V -5 V RRT2 12 k CAX 2.2 nF A(TIP) CHP B(RING) CBX 2.2 nF RYOUT1 RYOUT2 RYE B2EN C1 C2 C3 D1 D2 E1 DET RINGIN AGND/ DGND CSLEW 0.33 F BATTERY GROUND 18 nF HPB B(RING) RSN RDC1 80 k RDC RDCR RDCR 2.0 k CDC 1.2 F RDC2 20 k A(TIP) HPA RRT1 430 k RTRIP1 RTRIP2 VCC VNEG RD RSGH RSGL VTX RD 75 k RSGH open RSGL open VTX RRX 300 k VRX
CRT 1.5 F
RT 300 k
D1 BAT1 D2 BAT2 0.1 F BGND 0.1 F VBAT2 VBAT1
RSLEW 100 k See Note.
ANALOG GROUND
Note: The input should be 50% duty cycle CMOS-compatible input.
DIGITAL GROUND
H. AM79R70 Test Circuit
16
AM79R70 Data Sheet
PRELIMINARY
APPLICATION CIRCUIT
+5 V -5 V RRT2 12 k RTRIP1 RRT1 515 k CAX = 2.2 nF
K1 K1
CRT 1.5 F RFA = 50 TIP Bat1
VCC VNEG RD RSGH RSGL VTX RD 66 k RSGH open RSGL open VTX
RTRIP2
A(TIP) CHP 18 nF HPA HPB B(RING)
RT1 RT2 CT RDC1 50 k
125 k
G TISP A 61089 A K2 K2
RRX 125 k 250 k VRX RDC2 50 k CDC 820 nF CDCR 10 nF RDCR2 15 k
RSN
RING RFB = 50
CBX = 2.2 nF RYOUT1 RYOUT2 RYE
RDC RDCR1 RDCR 15 k
D1 BAT1 D2 BAT2 0.1 F BGND 0.1 F VBAT2 VBAT1
B2EN C1 C2 C3 D1 D2 E1 DET RINGIN AGND/ DGND
RSLEW 150 k See Note. CSLEW 0.33 F BATTERY GROUND
Assumptions: 1. 1.25 CF 2. 25 mA ILOOP 3. 100 mA Ringing Current Limit
4. 5.2 k High Battery Loop Threshold 5. 925 Ringing Loop Threshold 6. 600 Two-wire Impedance, 600 ZL
7. G42L = 1 8. -67 V Vbat1, -24 V Vbat2
ANALOG GROUND
Note: The input should be 50% duty cycle CMOS-compatible input.
I. Application Circuit
DIGITAL GROUND
REVISION SUMMARY Revision A to Revision B
*
Minor changes were made to the data sheet style and format to conform to AMD standards.
Trademarks Copyright (c) 1998 Advanced Micro Devices, All rights reserved. AMD, the AMD logo and combinations thereof are trademarks of Advanced Micro Devices, Inc. DSLAC and QSLAC are trademarks of Advanced Micro Devices, Inc. Product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
SLIC Products
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